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A chip designed to convert high voltages into lower levels in electronics — a process known as DC-DC step-down conversion — more efficiently using a piezoelectric resonator. Credit: UC San Diego Jacobs School of Engineering
Engineers at UC San Diego have designed a new chip that could make data centers far more energy efficient by improving how power is delivered to GPUs.
As data centers continue to consume more electricity, engineers at the University of California, San Diego, have created a new chip design aimed at improving how graphics processing units (GPUs) handle power. The work focuses on a fundamental challenge in electronics: efficiently converting high voltages into the much lower levels required by computing hardware. In laboratory tests, a prototype chip carried out this type of conversion with high efficiency under conditions similar to those used in modern data centers.
The research, published in Nature Communications, could support the development of smaller and more energy-efficient computing systems.
The new DC-DC step-down conversion chip shown on a U.S. penny for scale. Credit: David Baillot/UC San Diego Jacobs School of Engineering
Improving How DC-DC Step-Down Converters Work
The new design rethinks a widely used component called a DC-DC step-down converter, which is present in nearly all electronic devices. These converters serve as a safeguard between power supplies and delicate circuits, lowering incoming voltage to levels that each component needs to operate safely.
In large-scale computing environments, electricity is typically distributed at 48 volts. However, GPUs require much lower voltages, usually between 1 and 5 volts. Managing this large drop efficiently has become more difficult as systems grow more powerful and space becomes more limited.
Limits of Conventional Power Conversion
Traditional step-down converters face performance challenges when handling large differences between input and output voltage. Efficiency tends to decrease, and it becomes harder to supply sufficient current. Most existing designs rely on magnetic components such as inductors. While these components have been refined over time, they are nearing their practical limits and are becoming harder to scale for future needs.
“We’ve gotten so good at designing inductive converters that there’s not really much room left to improve them to meet future needs,” said study senior author Patrick Mercier, professor in the Department of Electrical and Computer Engineering at the UC San Diego Jacobs School of Engineering.
A piezoelectric resonator (white disk) used by the new chip to perform DC-DC step-down conversion. For comparison, an inductor that is typically used in traditional step-down converters is shown on the left. Credit: David Baillot/UC San Diego Jacobs School of Engineering
Piezoelectric Resonators Offer a New Approach
To explore alternatives, Mercier and his team, including first author Jae-Young Ko, an electrical and computer engineering Ph.D. student at UC San Diego, investigated the use of piezoelectric resonators. These small devices store and transfer energy through mechanical vibrations rather than magnetic fields.
Converters based on piezoelectric components could offer several advantages, including smaller size, higher energy density, improved efficiency, and easier large-scale manufacturing. “They have a lot of room to grow and have the potential to deliver better performance than anything that’s come before them,” Mercier said.
Still, earlier versions of these converters have struggled to maintain efficiency and provide enough power when dealing with large voltage differences.
Hybrid Circuit Design Achieves High Efficiency
To overcome these challenges, the researchers developed a hybrid design that combines a piezoelectric resonator with small, commercially available capacitors arranged in a specific configuration. This approach enables the converter to handle larger voltage drops more effectively.
The design was integrated into a prototype chip and tested in the lab. It successfully converted 48 volts down to 4.8 volts — a level commonly required in data centers — reaching a peak efficiency of 96.2 percent. The chip also delivered about four times more output current compared to earlier piezoelectric-based designs.
The printed circuit board used to test the new DC-DC step-down conversion chip, shown in the center, surrounded by capacitors. The piezoelectric resonator is mounted underneath the circuit board and electrically connected to the chip. Credit: David Baillot/UC San Diego Jacobs School of Engineering
Key Benefits of the New Chip Design
This hybrid setup offers several advantages. It creates multiple pathways for power to move through the circuit, reduces wasted energy, and lowers the load on the resonator. These improvements lead to higher efficiency and stronger power delivery, while only slightly increasing the overall size of the chip.
Challenges and Future Development
Although promising, the technology is still in its early stages. Researchers see it as an important step toward addressing the limitations of current power converters. Future work will focus on refining materials, improving circuit performance, and developing better packaging methods.
One practical challenge is that piezoelectric resonators vibrate during operation, which means they cannot be attached to circuit boards using standard soldering techniques. New integration methods will be needed to incorporate them into electronic systems, Mercier explained.
“Piezoelectric-based converters aren’t quite ready to replace existing power converter technologies yet,” Mercier added. “But they offer a trajectory for improvement. We need to continue to improve on multiple areas — materials, circuits, and packaging — to make this technology ready for data center applications.”
This project was supported in part by the Power Management Integration Center (PMIC), an Industry-University Cooperative Research Center (IUCRC) funded by the National Science Foundation (award number 2052809).
Reference: “A hybrid piezoelectric resonator-based DC-DC converter” by Jae-Young Ko, Wen-Chin B. Liu and Patrick P. Mercier, 17 March 2026, Nature Communications.
DOI: 10.1038/s41467-026-70494-0
This project was supported in part by the Power Management Integration Center (PMIC), an Industry-University Cooperative Research Center (IUCRC) funded by the National Science Foundation (award number 2052809).
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